1. Field
Example embodiments relate to methods of manufacturing a semiconductor device. More particularly, example embodiments relate to methods of manufacturing a semiconductor device including wiring structures.
2. Description of the Related Art
Wirings of a semiconductor device may be formed by a damascene process in an insulating interlayer, and the insulating interlayer may include a low-k dielectric material so as to decrease the parasitic capacitance between the wirings. The insulating interlayer including the low-k dielectric material may be damaged when an etching process for forming a trench and/or a via hole so that the dielectric constant of the insulating interlayer may increase. Accordingly, the parasitic capacitance between wirings filling the trench and/or the via hole may increase.